The MPEG-1 standard was developed in response to the industry need of implementing an efficient way of storing and retrieving a video information on storage media of the digital type, such as, for example CD-ROMs. Of course, the MPEG-1 standard is also a powerful tool for efficiently storing data on similar 15 media such as DATs, Winchester disks, optical disks and ISDN and LAN networks. A more efficient version of the standard called MPEG has been developed in support of bit rate requisites in the field of digital video transmission applications. The standard has been generally accepted for digital TV systems, for compressing TV-resolution pictures, entirely interlaced, up to a bit rate of about 15 Mbps. A special version of the MPEG standard is expected to be used in future generation HDVT systems.
The MPEG standard incorporates and uses important algorithms and criteria defined by previous international standards, such as, for example, the CCITT motion vectors determination algorithm H.261 and the ISO 10918 standard of the ISO JPEG Committee for the coding of still pictures. A definition of the MPEG standard (1 and 2), and a thorough description of the different application techniques and the relative coding and decoding systems of the data relative compressed video pictures according to the MPEG standards are described in a wealth of articles and publications on the subject, including the following:
Draft International ISO/IEC DIS 13818-2 "Information technology-Generic coding of moving pictures and associated audio information"; PA1 "MPEG coding and transport system" by Leonardo Chiariglione, Digital Television Broadcasting-Proceedings; PA1 "The MPEG video compression algorithm" by Didier J. Le Gall, Signal Processing Image Communication, Elsevier Science Publishers B.V., Vol. 4, No. 2, April 1992; PA1 Digest No. 1995/012, Electronics Division, Institution of Electrical Engineers-London, Colloquium on: "MPEG-2--what it is and what it isn'2"; PA1 "An Overview of the MPEG-2 Compression Algorithm" Technical Note released by SGS-THOMSON MICROELECTRONICS (An 529/0294); PA1 Datasheet "STi3500A" Datasheet of SGS-THOMSON MICROELECTRONICS; and PA1 "STi3520A--Advanced Information for an MPEG Audio/MPEG-2 Video Integrated Decoder" (June 1995). PA1 A "Bit buffer": that is a buffer for compressed data that the MPEG-2 standard fixes at 1.75 Mbits plus an extra amount, for example of 983.040 bits, in consideration of a nonideal process of decompression being actually carried out; PA1 A first "I-frame buffer" for the decompressed Intra-picture or briefly I-picture, in a 4:2:0 format; PA1 A second "P-frame buffer" for the decompressed Predicted-picture or briefly P-picture, in a 4:2:0 format; and PA1 A third "B-frame buffer" for the decompressed Bidirectionally Predicted Picture or briefly B-picture, in a 4:2:0 format, eventually optimized so to require a reduced amount of memory, which is 0.7407 or 0.6111 of a frame respectively in a PAL or NTSC system. PA1 (1) the recompression of the pictures is carried out in a simple fashion so that the total cost of the device does not increase sharply if compared to the saving deriving from not using part of the memory; PA1 (2) the quality of the reconstructed pictures undergoes a negligible degradation or anyway acceptable in terms of cost/quality; and PA1 (3) optionally and preferably the number of the primary clock cycles, which regulates the functioning of the external memory, required to draw from this external memory the predictor for the motion compensation process can be advantageously reduced. To obtain this and according to a preferred embodiment, a part of the compressed information is stored in the chip of the decoder's "core", in a dedicated buffer as hereinbelow illustrated.
According to a typical architecture of an MPEG-2 decoder, such as that shown in FIG. 3 of the publication No. STi3520A relative to an MPEG Audio/MPEG-2 Video integrated decoder marketed by SGS-THOMSON MICROELECTRONICS, herein reproduced as FIG. 1, there exist well-defined requisites of video memory, that is, the capacity of an external DRAM memory that, for a PAL and NTSC application, can support 16 Mbits PAL video signals. These requisites of video memory can be estimated as follows.
Considering that both the MPEG-2 video decoder and the MPEG audio decoder access a unique external DRAM memory of 16 Mbits through a common interface, the audio decoder may require access to only 131,072 bits leaving the remaining 16,646,144 bits available for satisfying the requisites of the MPEG-2 video decoder. The video memory can be configured as follows:
According to the actual MPEG-2 standard technique, and despite dealing with an I, P or B-picture dependently on the type of video standard, each "frame buffer" in the 4:2:0 format may occupy an amount of memory given by the following table.
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720 .times. 576 .times. 8 for the luma (luminance) (Y) 3,317,760 bits =4,976,640 bits 360 .times. 288 .times. 8 for the U chroma (chrominance 829,440 bits 360 .times. 288 .times. 8 for the V chroma (chrominance 829,440 bits NTSC 720 .times. 480 .times. 8 for the luma (luminance) (Y) 2,764,800 bits =4,147,200 bits 360 .times. 240 .times. 8 for the U chroma (chrominance 691,200 bits 360 .times. 240 .times. 8 for the V chroma (chrominance 691,200 bits __________________________________________________________________________
Therefore, in a PAL system which representing the most burdensome case may serve as a reference example, the actual total amount of memory required will be given by: EQU 5 1,835,008+835,584+4,976,640+4,976,640+(4,976,640*0.7407)=16,310,070 bits.
This calculation considers a 0.7407 optimization of the B-picture frame buffer.
A further optimization may include undertaking the decompression of the B-picture without resorting to a storage step in the external RAM by carrying out an equivalent function internally in the integrated decoder device by a dedicated circuit block functionally placed upstream of the Display Unit.
Considering this further optimization, the video RAM requirement drops to: EQU 1,835,008+835,584+4,976,640+4,976,640=12,623,872 bits
Where the B-buffer is realized within the same chip containing the "core" of the decoder being required to convert the scanning of each 8*8 block defined in the MPEG-2 compressed data stream, in that of each row of the picture (field or frame) required by the video display process of the picture itself. Such conversion macrocell is commonly called "MACROBLOCK TO RASTER SCAN CONVERTER".
In the prior European patent application No. 96830106.9, filed on Mar. 11, 1996, in the name of the same assignee, a method and related device were described that allowed for a remarkable reduction of the above cited video memory requisite to about 8 Mbits. The idea behind the invention that was described and claimed in the above identified previous patent application is the recognition that the amount of memory required by the MPEG decoding process as stated in the above calculations, can be remarkably reduced when allowing for: a recompression of the pictures used as a reference for the prediction (I-picture and P-picture for the case of the standards MPEG-1 and MPEG-2), after the MPEG decompression and before they are temporarily stored in the external video memory; and their decompression when they are read from the external memory.